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PCIe Verification EngineerSanta Clara, California, United States

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PCIe Verification Engineer

Santa Clara | California | United States

Central to our mission is a highly programmable chip. As part of the verification team, you will be responsible for independently creating leading edge constrained-random verification environments and using them to drive functional correctness of innovative designs. This position requires in-depth knowledge in all layers of PCIe protocol including SR-IOV. Required experience of PCIe switch verification including configuration and reset sequences, discovery, error events and performance.
Skills, Education, and Experience Required
  • BS in Electrical Engineering or equivalent degree
  • 8+ years of experience in ASIC/SoC verification with SV/UVM environments
  • In-depth knowledge of verification flows
  • Clear understanding of constrained random verification process, functional coverage, assertion methodology and philosophy
  • Team player with excellent communication skills and the desire to take on diverse challenges
Additional Success Factors
  • Advanced knowledge of CPU, cache hierarchy, and SoC architecture/design
  • Experience in verifying Ethernet, TCP/IP and other communication protocols
  • GPU knowledge related to APIs (OpenGL, CUDA etc.)
  • Knowledge of formal verification, hardware emulation
  • Experience with security
  • Startup experience
Keywords CPU, GPU, SoC, ASIC, silicon, chip, processor, cache, fabric, networking, SSD, architecture, design, verification, CAD tools, x86, ARM, MIPS

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