Front End Infrastructure Engineer at Fungible
Santa Clara, CA, US
Central to our mission is a highly programmable chip. As part of the frontend team, you will be responsible for independently developing the Verification and Design infrastructure for our SoCs and driving productivity improvements in our design flows.

Skills, Education, and Experience Required
BS and/or MS in Computer Science, EE or equivalent degree
5+ years of experience in ASIC/SoC tool development
Programming fluency in Perl, Python, C/C++
Working knowledge of ASIC design and verification flows, methodologies
Exposure to continuous integration flows
Clear understanding of constrained random verification process, functional coverage, code coverage, assertion methodology and philosophy
Team player with excellent communication skills and the desire to take on diverse challenges
Additional Success Factors
Advanced knowledge of CPU and SoC architecture and design
Knowledge of EDA tools
Ability to quickly diagnose and fix tool problems
Startup experience

silicon, chip, SoC, ASIC, processor, CPU, GPU, design, verification, CAD tools, infrastructure, BIST, CSR